The present invention relates to a method and implementing apparatus for data recording and reproducing, and more particularly it relates to a method and apparatus for optical recording/reproducing using an optical disk.
In optical recording/reproducing systems using DRAW (Direct Read After Write) disks, two different tracking control techniques are employed in formatting for optical recording and reproducing.
One is called the Continuous Servo Format. In this system signals are optically recorded in a continuous groove or on a continuous land on a disk surface.
The other is called the Sampled Servo Format. The present invention to be described in detail hereinafter is related to this format. With the Sampled Servo Format each sector is divided into 43 segments, each a servo block, and each servo block consists of a series of 2 preliminary bytes carrying servo information (servo bytes) and a balance of 16 bytes carrying data information (data bytes). As shown in FIG. 5. the servo area in which the servo bytes are recorded is composed of two wobble marks (pits) for tracking control and one clock mark- (pit) for synchronization. The wobble marks (pits) are located at positions one of which is offset towards the center of the disk and the other towards the outer radius relative to the center of an imaginary track on a disk surface.
When an optical pick-up head (a photosensing spot to detect information) correctly passes in the center of the imaginary track, the amplitude of reflected signals received by the head at the position of each offset wobble mark are identical because the magnitude of the divergence of the inner and outer marks relative to the center is the same. In such case, the amplitude of the reflected signal is the same for each wobble mark. When the optical pick-up head does not correctly pass in the center of the imaginary track, the amplitude of reflected signal received by the head varies depending on the direction and magnitude of divergence of the pick-up head from the center of the imaginary track. Such divergence of the head from the imaginary track causes the amplitude of the reflected light from each wobble mark to be different. The tracking error signal is derived from this amplitude difference, and held until the next servo area is sensed.
The distance between the two wobble marks changes every 16 tracks. Track position information in the fast-seek mode is derived by detecting this distance.
Referring again to FIG. 5. the distance (D) between the second wobble mark and the clock mark is a predetermined length which does not appear in the other data bytes, and is called the "unique distance". Therefore, this distance can also be used to produce a synchronization signal. The various timing signals are then derived from this synchronization signal. The clock signal is derived from the repetition of the clock mark. The surface in the "unique distance" (D) between the second wobble mark and clock mark, is assigned as a focusing area from which a focus error signal is obtained. The focus error signal is held while the data areas are scanned by the pick-up head and remains held until the next servo area is scanned.
On rotating a Sampled Servo Format, DRAW disk at 1800 rpm. an edge of a clock signal pulse included in the RF signal appears with a frequency of 41.28 kHz.
The recording/reproducing apparatus reads address information recorded at positions following the aforesaid servo bytes as shown in FIG. 6 to record and reproduce the information signals in the data area of the Sampled Servo Format. DRAW disk. in the manner well known in the prior art. A block diagram of such a conventional recording/reproducing apparatus is illustrated in FIG. 1.
The conventional technique for recording/reproducing a DRAW disk will now be explained with reference to FIG. 1. To accomplish reproduction, the RF signal reproduced by a pick-up head (1) from a disk (not shown) is boosted in a head amplifier (2) and inputted to a derivative-edge-detection circuit (3). The derivative-edge-detection circuit (3) is designed to detect the edge of the signal generated by differentiating of the RF signal, and to supply a series of edge pulses each corresponding to an edge of the differentiated RF signal. The edge pulse (a) which is outputted form the derivative pulse-edge detection circuit (3) is delayed by a delay circuit (4) and supplied to a PLL (Phase Locked Loop) circuit (5) and a synchro-detection-protection circuit (6).
The PLL circuit (5) comprises an AND gate to which is supplied the edge pulse (a) as one of the input signals. It is designed to generate a reproduced clock signal (e) which is synchronized with the output signal from the AND gate. The reproduced clock signal (e) is introduced to the synchro-detection-protection circuit (6) from the PLL circuit (5). The synchro-detection-protection circuit (6) measures the pulse spacing between any two series of edge pulses (a) by counting the reproduced clock signals (e) and deriving a synchro-detection signal (b) only when the measured pulse spacing is identical to a specified predetermined value. This synchro-detection signal (b) is introduced, to a gate pulse generating circuit (7). The gate pulse generating circuit (7) is designed to generate a clock gate pulse (c) with a predetermined pulse interval when a predetermined delay time has passed since said synchro-detection signal is inputted, which time is based on the reproduced clock signal (e) from the PLL circuit (5). The clock gate pulse (c) supplied from the gate pulse generating circuit (7) is another input signal to the AND gate of the PLL circuit (5). As a result, a clock edge pulse which corresponds to the clock mark is derived and outputted from the AND gate of the PLL circuit (5) to generate the reproduced clock signal (e). The reproduced clock signal (e) in synchronism with the aforesaid clock edge pulse may for example, be of a frequency of 11.1456 MHz.
The RF signal (d) which is outputted from the head amplifier (2) is supplied to an A/D converter (9). The RF signal is sampled by the reproduced clock signal (e) in the A/D converter (9) and the sampled data converted into digital data. The digital data outputted from the A/D converter (9) are supplied to a demodulating circuit (10) where the data, modulated during the recording process, are demodulated into the original form. The demodulated data are processed by an error correction circuit (11) and outputted as the reproduced data signal.
In the recording process, the data to be recorded are supplied to a modulation circuit (12) for processing. The modulated data is delayed in a delay circuit (13) and then input to recording circuit (14) for application to the recording head (1). The amplitude of the output signal from the pick-up head (1) is controlled according to the modulated signal. In this way the data processed as described above are recorded on an optical disk.
In the aforesaid prior art technique, the time lag provided by the delay circuit (4) is set so that the leading edge of the reproduced clock signal (e) will correspond to the peak of the RF signal (d) (FIG. 2A) in the ND converter in order to realize accurate data reproduction.
Meanwhile, the data to be stored on a DRAW disk are recorded in synchronism with the reproduced clock signal (e) derived from the preformatted data. As the reproduced clock signal (e) correctly follows the variation of the disk like velocity caused by disk deflection, there is no need for a gap area to absorb an error due to variation of the line velocity. However, for reproducing a recorded signal, since it is based upon the reproduced clock signals (e) which are in synchronism with preformatted clock marks, the location of each recorded datum mark should be positioned where the distance between the center of the preformatted clock mark and that of each recorded datum mark are exactly an integer multiple of the clock distance. This positioning is obtained by the delay circuit (13) which absorbs various factors which cause the signal to be delayed such as: the head amplifier, the derivative circuit, the PLL circuit, the recording circuit, an optical retardation component from the disk surface to the photodetector, and a time lag required to complete making a datum mark on a recording layer when a photo-signal to be recorded is projected to the disk surface.
However, heretofore, because the delay time provided by this delay circuit (13) is fixed and therefore there are no means to adjust the time lag, the correct relationship between the reproduced clocks signals (e) and the peak of the RF signal has not been maintained (as illustrated in FIG. 2A and 2B) between the peak of the RF signal and the leading edge of the reproduced clock signal (e). The relationship between these signals will change due to aging or variations in the optical retardation of a recording layer on exchanging a DRAW disk. This causes a poor error ratio in the reproduced data.